The present invention relates to data storage systems. Specifically, the present invention describes a routing device that provides the ability to concurrently route command and data over a serial storage link protocol in a data storage system.
The need for large data storage motivates the building of large-scale and high-capacity storage systems. A high capacity storage system requires a storage controller that enables a host to communicate with a large number of storage devices. A typical storage controller is a processor that receives a command from a host, and translates the command into a format, essential for communication with the storage devices. Currently, this communication is serial in nature. The serial communication is enabled by storage serial protocols such as Serial Advanced Technology Attachment (SATA), or Serially Attached SCSI (SAS), which employ a point-to-point connection. A storage controller that uses SATA or SAS-based protocol to communicate with the storage devices needs a switching or device control unit that interconnects the storage controller to the plurality of storage devices.
The communication between the host and the storage devices involves the exchange of command and data. The host sends a command to a storage device to perform a read or write operation. The read or write operation is performed after the storage device, to which the command is sent, has accepted the command. After the command has been accepted, the data can either be read out from the storage device, or a new data can be written into the storage device. This communication, based on the SATA or SAS-STP protocol, is made in the form of a “Frame Information Structure”(FIS). The FIS encapsulates the command and data being exchanged between the host and the storage device. Further details of FIS are described in serial ATA specification 1.0 described in the article “Serial ATA: High Speed Serialized AT Attachment”, Aug. 29, 2001.
An interconnecting unit between the host and the storage devices enables the above-described communication. Two draft standards, based on SATA protocol, have been proposed for this interconnecting unit.
The first standard involves a port multiplier (PM) approach, which uses a multiplexer to multiplex an active host connection to up to 15 device connections. This enables utilization of the full bandwidth of the host connection. The PM approach requires the modification of the packet structure in SATA, in particular the FIS to incorporate the PM routing field. Consequently, either the host or the interconnecting unit has to be modified to produce PM FIS (FIS specific to the port multiplier).
The second standard involves a routers, switches and multiplexers (RSM) approach. This approach consists of an interconnecting unit that allows command and data information to be directed from one or more hosts to multiple storage devices. The interconnecting unit utilizes a wrapper FIS into which all other FIS types can be encapsulated. The wrapper FIS includes a header that is used to define and activate a connection between route-aware devices. However, this approach requires a SATA-based host or interconnecting unit to support RSM, in order to provide this connectivity. In addition, all the elements in the SATA-based interconnecting unit have to be RSM route aware and able to process the header to forward the encapsulated FIS.
The interconnecting unit, based on any of the above-described two approaches can be used to connect a plurality of storage devices to a plurality of hosts. This interconnecting unit contains multiple RSMs or multiplexers to connect the storage devices and the hosts.
An interconnecting unit is described in U.S. patent application No. US2004/0024950 titled ‘Method and Apparatus for Enhancing Reliability and Scalability of Serial Storage Devices’. This patent application describes a method and system for data communication between a plurality of hosts and a plurality of storage devices. The communication is achieved by using a switch architecture-based interconnecting unit.
Another interconnecting unit is described in WIPO Publication No. WO03091887 titled ‘Method and Apparatus for Dual Porting a Single Port Serial at a Disk Drive’. The patent describes a method and system to connect single port devices to a plurality of hosts. The invention provides a switched assembly to selectively connect a storage device to one of the plurality of hosts.
The above-mentioned interconnecting units suffer from one or more of the following limitations. First, the implementation of an interconnecting unit based on the PM or RSM approach requires changes to be made to the architecture of hosts, which is expensive to implement. The RSM system is expensive because it involves host modification. Further, the RSM system is not backward compatible with existing solutions, thus it also involves software changes. On the other hand, the cost of the port multiplier is dependent on the host design. A host that allows for commands to be sent to multiple devices can be very expensive. Consequently, the port multiplier is expensive although it has a relatively higher performance. The hosts that allow one command to be active at a time are not expensive and thus the port multiplier is not expensive. But, this host/PM solution has lower performance.
Secondly, the interconnecting unit, based on either approach, is very complex. For example, to connect ‘m’ hosts to ‘n’ number of storage devices, m*n multiplexers are required. As a result, the design complexity of the interconnecting unit increases substantially. Increased complexity results in the need for a larger chip area, and, consequently, high cost and high power consumption. Thirdly, the interconnecting unit allows a single command to be executed at a time. Even if the multiple hosts issue multiple commands at the same time, the interconnecting unit is able to execute only one command at a time. Consequently, the throughput of the interconnecting unit is low. Fourthly, the interconnecting unit will fail to operate where a failure is encountered in the path between a host and a storage device. This means that the communication is not reliable and robust enough to tolerate faults and thus lowers the storage device's availability.
In light of the above-described limitations, there is a need for a simple, cost-efficient interconnecting unit that enables a plurality of storage controllers to communicate with a large number of serially attached storage devices. The interconnecting unit should avoid changes in the architecture of the hosts, thereby reducing cost. Further, the interconnecting unit should have higher throughput and should allow reliable communication between the hosts and the storage devices. The mechanism should be strong enough to tolerate at least a single point of failure and not limit the availability of the storage devices in case of a fault.